Chalcogenide Semiconductor Lab

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Chalcogenide Semiconductor Lab

Publications

Paper
- 전체
- 2016
- 2015
- 2014
- 2013
- 2012
- 2011
- 2008
- 2007
- 2006
- 2005
- 2004
- 2003
- 2001
- 1999
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Conferences
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- 2014
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- 2020
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International Patents

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2020

					
						Memory devices having cross point memory arrays therein with multi-level word line and bit line structures 												
																		
										Memory devices having cross point memory arrays therein with multi-level word line and bit line structures 									
								
						Memory device and electronic apparatus including the same												
																		
										Memory device and electronic apparatus including the same									
								
						Semiconductor devices and methods of manufacturing the same												
																		
										Semiconductor devices and methods of manufacturing the same									
								
						Variable resistance memory devices and methods of manufacturing the same												
																		
										Variable resistance memory devices and methods of manufacturing the same									
								
						Memory device and method of manufacturing the same												
																		
										Memory device and method of manufacturing the same									
								
						Memory cell and memory device comprising selection device layer, middle electrode layer and variable resistance layer												
																		
										Memory cell and memory device comprising selection device layer, middle electrode layer and variable resistance layer									
								
						Variable resistance memory devices and methods of manufacturing the same												
																		
										Variable resistance memory devices and methods of manufacturing the same

2018

"Semiconductor memory devices" "Semiconductor memory devices"

2017

“Neuromorphic System and Configuration Method Thereof” “Neuromorphic System and Configuration Method Thereof”

2016

“Variable Resistance Memory Device and a Variable Resistance Memory System including The Same” “Variable Resistance Memory Device and a Variable Resistance Memory System including The Same”

"VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME" "VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME"

2011

					
						“Resistance variable memory device and method of writing data”												
																		
										“Resistance variable memory device and method of writing data”									
								
						“PHASE CHANGE MEMORY DEVICES AND READ METHODS USING ELAPSED TIME-BASED READ VOLTAGES”												
																		
										“PHASE CHANGE MEMORY DEVICES AND READ METHODS USING ELAPSED TIME-BASED READ VOLTAGES”									
								
						"Resistance variable memory device and method of writing data"												
																		
										"Resistance variable memory device and method of writing data"

2010

					
						“Multi-level cell phase change memory devices having controlled resistance-drift parameter, memory systems employing such devices and methods of reading memory devices”												
																		
										“Multi-level cell phase change memory devices having controlled resistance-drift parameter, memory systems employing such devices and methods of reading memory devices”									
								
						“Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices”												
																		
										“Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices”									
								
						“PHASE CHANGE MEMORY CELL WITH TRANSPARENT CONDUCTING OXIDE FOR ELECTRODE CONTACT MATERIAL”												
																		
										“PHASE CHANGE MEMORY CELL WITH TRANSPARENT CONDUCTING OXIDE FOR ELECTRODE CONTACT MATERIAL”									
								
						“Non-Volatile Electrical Phase Change Memory Device Comprising Interfacial Control Layer And Method For The Preparation Thereof”												
																		
										“Non-Volatile Electrical Phase Change Memory Device Comprising Interfacial Control Layer And Method For The Preparation Thereof”

2009

“PHASE CHANGE MATERIAL FOR HIGH DENSITY NON-VOLATILE MEMORY” “PHASE CHANGE MATERIAL FOR HIGH DENSITY NON-VOLATILE MEMORY”

2007

“Phase change material and non-volatile memory device using the same” “Phase change material and non-volatile memory device using the same”

Book

2012

Chapter 2: Phase Change Memory in Volume 2 of NON VOLATILE MEMORIES: Materials, Devices and Applications Chapter 2: Phase Change Memory in Volume 2 of NON VOLATILE MEMORIES: Materials, Devices and Applications

Address

Dep. of Semiconductor Engineering, POSTECH 77,

Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea

(37673)

TEL: +82-54-279-7085

E-mail: daehwankang@postech.ac.kr

Address

Dep. of Semiconductor Engineering, POSTECH 77, Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea (37673)

TEL: +82-54-279-7085

E-mail: daehwankang@postech.ac.kr