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Memory devices having cross point memory arrays therein with multi-level word line and bit line structures

2023-08-24
조회수 250

J Jeong, D Kang, D Kim, K Lee Memory devices having cross point memory arrays therein with multi-level word line and bit line structures - US Patent 10,644,069, 2020

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Dep. of Semiconductor Engineering, POSTECH 77,

Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea

(37673)


TEL: +82-54-279-7085

E-mail: daehwankang@postech.ac.kr



Copyright ⓒ 2023. Chalcogenide Semiconductor Lab (CSL)

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Address

Dep. of Semiconductor Engineering, POSTECH 77, Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea (37673)


TEL: +82-54-279-7085

E-mail: daehwankang@postech.ac.kr


Copyright ⓒ 2023. Chalcogenide Semiconductor Lab (CSL) All rights reserved | Designed by greypixel