Address
Dep. of Semiconductor Engineering, POSTECH 77,
Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea
(37673)
TEL: +82-54-279-7085
E-mail: daehwankang@postech.ac.kr
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Copyright ⓒ 2023. Chalcogenide Semiconductor Lab (CSL)
All rights reserved | Designed by greypixel
Address
Dep. of Semiconductor Engineering, POSTECH 77, Cheongam-ro, Nam-Gu, Pohang, Gyeongbuk-Do, Korea (37673)
TEL: +82-54-279-7085
E-mail: daehwankang@postech.ac.kr
Copyright ⓒ 2023. Chalcogenide Semiconductor Lab (CSL) All rights reserved | Designed by greypixel
Chang Wook Jeong (Seoul, KR) Dae-Hwan Kang (Seoul, KR) Hyeong-Jun Kim (Seoul, KR) Jae-Min Shin (Suwon-Si, KR) Seung-Pil Ko (Suwon-Si, KR) Assignees: SAMSUNG ELECTRONICS CO., LTD “Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices” Samsung Electronics Co. Ltd. (US 07778079) 2010. 08.17